1. Field of the Invention
The present invention relates to a method for fabricating integrated circuits and more particularly to a method for achieving controllable spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT).
2. Description of the Prior Art
Heterojunction bipolar transistors (HBT's) are known in the art. Examples of methods of fabricating such HBT's are disclosed in U.S. Pat. Nos. 5,159,423; 5,272,095; 5,411,632; 5,446,294; 5,468,659; and 5,485,025. Such HBT's normally include a substrate, as well as epitaxially grown collector, base and emitter layers known to be formed by various methods, including molecular beam epitaxy. Such HBT's are normally formed with an emitter mesa, normally formed by well-known photolithography techniques. Known metalization techniques are used to form ohmic metal contacts on the emitter mesa, as well as the base.
It is known in the art that the base ohmic metal spacing to the emitter mesa is relatively critical to the device performance. In particular, if the base ohmic metal is deposited too close to the emitter mesa, a potential leakage path between the base and the emitter can be created, resulting in degradation of the gain (.beta.) of the device. Should the spacing between the base ohmic metal and emitter mesa be too large, the parasitic base resistance of the device will be too large, thereby degrading the performance of the HBT.
Various methods are known for controlling the spacing of ohmic contacts for various integrated circuits, including HBT's. Various methods rely on self-alignment of the base ohmic metal and the emitter mesa. For example, one known self-alignment method relies on etching the emitter with an emitter photoresist layer and retaining that layer during the patterning of the lift-off of the photoresist for the base ohmic metal. However, it is known that the spacing between the base ohmic metal and the emitter mesa is not controllable with such a method.
Another known method for controlling the spacing between the base ohmic metal and the emitter mesa relies on so-called spacer technology, frequently used in silicon processing. In that method, the emitter mesa is an anisotropically etched. After the emitter mesa is formed, a spacer layer is deposited and anisotropically etched. A base ohmic metal is patterned and lifted off by conventional techniques, except from over the spacer and emitter. The removal of the base ohmic metal from the spacer and emitter is known to done by ion milling. Unfortunately, damage from the anisotropic etches and the high-defect density usually encountered in the ion milling process limit the usefulness of this type of spacer technology.
Other methods for controlling the spacing between the emitter mesa and the base ohmic contacts are disclosed in U.S. Pat. Nos. 5,124,270; 5,159,423; 5,411,632; 5,446,294; 5,468,659; and 5,486,483. U.S. patent application Ser. No. 08/676,697, filed on Jul. 10, 1996, entitled "Method of Fabrication High Beta HBT Devices", by Lammert, assigned to the same assignee on the present invention now U.S. Pat. No. 5,804,487, also discloses a method for controlling the spacing of the base contacts relative to an emitter mesa. Although the methods described in the patent application and patents do provide some control of the spacing between the base ohmic metal and the emitter mesa, the methods disclosed are relatively complex and involve quite a few process steps.